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| w ee EEPROMS with I2C512 x 8-bithCMOS bus Interface aS at The INF8594E is 4-Kbit (512 8-bit) floating gate electrically erasable .D programmable read only memory (PROM). By using an internal redundant w storage to single bit errors. This feature w code it is fault tolerant conventional R memories.dramatically increases reliability compared to Power consumption is low due to the full S technology used. The programming voltage 1s generated on-chip, using voltage multiplier. As data bytes are received and transmitted via the serial I2C-bus, package using eight pins is sufficient. Up to four INF8594E devices may be connected to the Ic-bus. Chip select is accomplished by two address inputs. Timing of the Erase/Write cycle is done internally, thus no external components are required. Pin 7 must be connected to either VDD or left open-circuit. There is an option of using an external clock or timing the length of an Erase/Write cycle. A write protection input (pin 1) allows disable of write-commands from the master by hardware signal. When pin 1 is HIGH and one of the upper 256 R cells is addressed, then the data bytes will not be acknowledged by the INF8594E and the R contents are not changed. 4U t om .c TECHNICAL DATA INF8594E PIN ASSIGNMENT * Low Power CMOS maximum active current 2.5 m * maximum standby current 10 A * Non-volatile storage of 4-Kbits organized as two pages each 256 8-bits * Only one power supply required * On-chip voltage multiplier * Serial input/output bus (I2C) * Write operations byte write mode 8.byte page write mode (minimizes total write time byte) * Write-protection input * Read operations sequential read random read * .Extended supply voltage range (2,5 to 6.0 V). * Internal timer for writing (no external components) * .Power-on reset * .High reliability by using redundant storage code (single bit error correction) * .Endurance 100 k. Tamb = 85 * 10 years non-volatile data retention time * Pin and Address compatible to INF8594E Family and PCx8598X2 Family w w w t a .D S a e h U t4 e .c INF8594E Plastic DIP TA = -40 to 85C m o w w w .D a aS t ee h 4U t om .c 1 INF8594E ORDERING INFORMATION PACKAGE EXTENDED TYPE NUMBER PINS INF8594E 8 PIN POSITION DIP MATERIAL plastic CODE SOT97 QUICK REFERENCE DATA SYMBOL VDD IDDR IDDW IDDO PARAMETER Positive supply voltage Supply current READ fSCL= 100 kHz VDD= 3V VDD= 6V fSCL= 100 kHz VDD= 3V VDD= 6V VDD= 3V VDD= 6V CONDITIONS MIN 2.5 MAX 6.0 60 200 0.8 2.5 3.5 10 UNIT V A A mA mA A A Supply current ERASE/WRITE Supply current STANDBY LIMITING VALUES In accordance with the Absolute Maximum System (IEC 134) SYMBOL VDD VI II IO Tstg Tamb PARAMETER positive supply voltage voltage on any input pin current on any input pin output current storage temperature range ambient operating range INF8594E temperature -40 +40 C IZII > 500 CONDITIONS MIN -0.3 VSS-0.8 -65 MAX +7.0 VDD+0.8 1 10 +150 UNIT V V mA mA C 2 INF8594E CHARACTERISTICS INF8594E: VDD =4.5 to 5.5 V; VSS = 0 V; Tamb = -40 to +85C SYMBOL Supply VDD IDDR IDDW IDDO PARAMETER positive supply voltage PCF8594E supply current READ INF8594E supply current ERASE/WRITE INF8594E supply current STANDY INF8594E CONDITIONS MIN MAX UNIT 4.5 fSCL = 100 kHz VDD(max) fSCL = 100 kHz VDD(max) VDD(max) -0.8 0.9VDD VI = VDD or VSS VI = VSS -0.8 0.7VDD 0 -0.8 0.7VDD 10 5.5 200 2.5 10 0.1VDD VDD+0.8 0.3VDD VDD+0.8 1 100 7 0.3VDD VDD+0.8 0.4 1 7 - V A mA A V V V V A kHz pF V V V A pF yrs PTC Input VIL LOW level input voltage VIH HIGH level input voltage SCL Input VIL LOW level input voltage VIH HIGH level input voltage ILI input leakage current fSCL clock frequency CI input capacitance SDA Input/Output VIL LOW level input voltage VIH HIGH level input voltage ILI input leakage current fSCL clock frequency CI input capacitance Data retention time tS data region time IOH = 3 mA; VDD(min) VOH = VDD VI = VSS Tamb = 55 C The power-on reset circuit resets the I2C-bus logic with a set-up time 10 A. Selection of chip address is achieved by connecting the A1 and A2 inputs to either VSS or VDD. SYMBOL tSW PARAMETER ERASE/WRITE cycle time internal oscillator external clock ERASE/WRITE cycles per byte INF8594E Endurance Tamb = -40 to +85C tE/W = 4 to 10 ms Tamb = 22C; tE/W = 5ms Programming CONDITIONS Supply 4 25 5 5 0 7 10 10 000 100 000 60 300 300 tLOW kHz s s ns ns s ms ms MIN TYP MAX UNIT WRITE CYCLE LIMITS NSW tHIGH tr tf td fP tIL programming frequency LOW time HIGH time rise time fall time delay time 3 INF8594E LOGIC DIAGRAMM Ucc 1.5-10 WP WP Ucc A1 A2 U SS PTC SCL SDA PTC SCL WP Ucc A1 A2 U SS PTC SCL SDA WP A1 A2 U SS WP A1 A2 U SS SDA U SS 4 INF8594E 5 INF8594E N SUFFIX PLASTIC DIP (MS - 001BA) A 8 5 B 1 4 Dimension, mm Symbol A B MIN 8.51 6.1 MAX 10.16 7.11 5.33 0.36 1.14 2.54 7.62 0 2.92 7.62 0.2 0.38 10 3.81 8.26 0.36 0.56 1.78 F L C D C -T- SEATING N G D 0.25 (0.010) M T K PLANE F G M H J H J K L M N NOTES: 1. Dimensions "A", "B" do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side. 6 |
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